diff --git a/board/omap1610inn/lowlevel_init.S b/board/omap1610inn/lowlevel_init.S
index cc8347f..e4ed9f3 100644
--- a/board/omap1610inn/lowlevel_init.S
+++ b/board/omap1610inn/lowlevel_init.S
@@ -58,7 +58,7 @@
 	str	r1,	[r0]
 
 	/*------------------------------------------------------*
-	 * Set up ARM CLM registers (IDLECT2)  		        *
+	 * Set up ARM CLM registers (IDLECT2)		        *
 	 *------------------------------------------------------*/
 	ldr	r0,	REG_ARM_IDLECT2
 	ldr	r1,	VAL_ARM_IDLECT2
@@ -123,7 +123,7 @@
 
 	/*------------------------------------------------------*
 	 * Turn off the watchdog during init...			*
- 	 *------------------------------------------------------*/
+	 *------------------------------------------------------*/
 disable_wd:
 	ldr	r0,	REG_WATCHDOG
 	ldr	r1,	WATCHDOG_VAL1
@@ -156,13 +156,13 @@
 	 * and branch to appropriate initialization code.
 	 */
 	/* Load physical SDRAM base. */
-	mov 	r0, 	#0x10000000
+	mov	r0,	#0x10000000
 	/* Get current execution location. */
-	mov 	r1, 	pc
+	mov	r1,	pc
 	/* Compare. */
-	cmp 	r1, 	r0
+	cmp	r1,	r0
 	/* Skip over EMIF-fast initialization if running from SDRAM. */
-	bge 	skip_sdram
+	bge	skip_sdram
 
 	/*
 	* Delay for SDRAM initialization.
@@ -170,7 +170,7 @@
 	mov	r3,	#0x1800		/* value should be checked */
 3:
 	subs	r3,	r3,	#0x1	/* Decrement count */
-	bne 	3b
+	bne	3b
 
 
 	/*
@@ -270,7 +270,7 @@
 #ifdef CONFIG_H2_OMAP1610
 	/* inserting additional 2 clock cycle hold time for LAN */
 	ldr     r0,     REG_TC_EMIFS_CS1_ADVANCED
-	ldr    	r1,     VAL_TC_EMIFS_CS1_ADVANCED
+	ldr	r1,     VAL_TC_EMIFS_CS1_ADVANCED
 	str     r1,     [r0]
 #endif
 	/* Start MPU Timer 1 */